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Triton 5K 2015

Over 140 CSE alumni, students, staff and faculty registered to run as part of Team Race Condition. As a result, the department took home the prize for the largest turnout and donation at the 2015 Chancellor’s 5K run in early June. Read more…  


2015 Student Awards

CSE Chair Rajesh Gupta and Profs. Christine Alvarado and Sorin Lerner with graduate and undergraduate student recipients of the inaugural awards given by the department for graduating students.. Read more…


Dissertation Medal

CSE alumna Sarah Meiklejohn (PhD '14) was singled out for her dissertation, "Flexible Models for Secure Systems", as the recipient of the 2015 Chancellor's Dissertation Medal. Meiklejohn is now a professor at University College London. Read more…


Research Expo 2015

At the Jacobs School of Engineering’s Research Expo 2015, more than 25 CSE graduate students showcased their research during the poster session visited by hundreds of campus, industry and community members. Read more…


Best Poster

Graduating M.S. student Narendran Thangarajan won the award for best Computer Science and Engineering poster at Research Expo 2015. He analyzed social media to characterize HIV at-risk populations in San Diego. Read more…  


Computer Graphics on EdX

After announcing the launch of the Center for Visual Computing, the Center's director, CSE Prof. Ravi Ramamoorthi, announced that in August 2015 he will launch an online course on computer graphics over the edX online platform. Read more…


$2 Million Alumni Gift

CSE alumnus Taner Halicioglu, an early employee at Facebook, is donating $2 million to the CSE department to recruit, retain and support the professors and lecturers whose primary mission is to teach and mentor students. Read more…


Big Pixel Hackathon

Seventeen CSE students, most of them graduate students, participated in the first Bix Pixel Hackathon organized by the Qualcomm Institute to demonstrate how data science can be harnessed to tackle public policy issues. Read more...


Paul Kube Tribute

CSE honored retiring lecturer Paul Kube with a tribute and the subsequent announcement that CSE is creating the Paul R. Kube Chair of Computer Science to be awarded to a teaching professor, the first chair of its kind in the department. Read more...


Integrated Digital Infrastructure

CSE Prof. Larry Smarr leads a two-year initiative to deploy an Integrated Digital Infrastructure for the UC San Diego campus, including grants to apply advanced IT services to support disciplines that increasingly depend on digital data. Read more...


Query Language for Big Data

CSE Prof. Yannis Papakonstantinou and Couchbase Inc., are collaborating on a next-generation query language for big data based on the UCSD-developed SQL++, which brings together the full power of SQL with the flexibility of JSON. Read more...


Honoring Academic Integrity

At 5th annual Academic Integrity Awards, CSE lecturer Gary Gillespie (center, with Leo Porter and Rick Ord) accepted the faculty award in Apri. Then in May, he received the Outstanding Professor Award from the Panhellenic Association. Read more...


Non-Volatile Memories

In March 2015, CSE Prof. Steven Swanson talks to 220 attendees at the 6th annual Non-Volatile Memories Workshop which he co-organized, and which he said was "moving onto deeper, more Interesting and more challenging problems." Read more...


Frontiers of Innovation

At least five CSE graduate students and a similar number of undergraduates were selected to receive inaugural Frontiers of Innovation Scholarship Program (FISP) awards initiated for 2015-'16 by UC San Diego. Read more...


Not-So-Safe Scanners

A team including CSE Prof. Hovav Shacham (right) and Ph.D. student Keaton Mowery released findings of a study pointing to serious flaws in the security of backscatter X-ray scanners used at many airports. Read more...


Stereo Vision for Underwater Archaeology

As co-director of Engineers for Exploration, Prof. Ryan Kastner led expeditions to test an underwater stereo camera system for producing 3D reconstructions of underwater objects. Here Kastner is shown with the camera system in a UCSD pool. Read more…  

Kastner Underwater

Girls Day Out

The UCSD chapter of Women in Computing (WiC) held its second annual Girls Day Out in May, bringing roughly 100 girls from San Diego high schools to tour the campus and do hands-on experiments in electronics. Here, girls visit the Qualcomm Institute’s StarCAVE virtual reality room. Read more…  

Girls Day Out

Coding for a Cause

Then-sophomore Sneha Jayaprakash's mobile app, Bystanders to Upstanders (B2U), matches students with opportunities to volunteer for social causes. Together with fellow CSE undergrads, she won a series of grants and awards, and is now doing a startup. Read more...

Sneha Jayaprakash

Internet of Things

Computer scientists at UCSD developed a tool that allows hardware designers and system builders to test security. The tool tags then tracks critical pieces in a hardware’s security system. Pictured (l-r): Ph.D. student Jason Oberg, Prof. Ryan Kastner, postdoc Jonathan Valamehr. Read more…

Internet of Things

The Gift That Keeps on Giving

CSE capped the 2012-'13 academic year with the announcement of an anonymous $18.5 million gift from an alumnus – making it the largest-ever alumni gift to UC San Diego. Read more...

  • Accelerating Design Times for High-Performance Systems-on-Chip

    A team of computer scientists and electrical engineers from four U.S. universities have been awarded a joint project with nearly $5 million in funding from the Defense Advanced Research Projects Agency (DARPA). Led by University of California San Diego computer-engineering professor Rajesh Gupta, the group of nine faculty members -- five from UC San Diego, one each from UCLA and the University of Michigan, and two professors from Cornell University – will develop a “synthesis methodology for accelerator-centric systems-on-chips and tool flows” that goes by the name CERTUS (Latin for definite, trustworthy or reliable). 

    Productivity involving the time it takes to design systems-on-chips (SoCs) has remained flat, largely because of the design complexity that is also responsible for rapidly rising costs. Indeed, as much as 50 percent of design and verification time must be devoted to designing high-performance analog parts, customized data-paths, and design exploration to meet schedules.

    “All parts of chip design from clocking, sensing circuits to integrated data paths and synthesized random logic must come together in complicated tool flows that are, of necessity, hand-crafted to a specific process and process node,” said CERTUS principal investigator Rajesh Gupta. “This causes multiple iterations through various design stages, so we need to come up with new methodologies to achieve a dramatic improvement in design times.” [Pictured above: Grad student Atieh Lotfi is on the CERTUS project as part of Gupta's group at UC San Diego.]

    CERTUS is part of the DARPA Circuit Realization at Faster Timescales (CRAFT) effort, which aims to reduce chip design times to a target 16-week design time for an SoC, including 5 weeks of physical design and closure. That represents a 10x improvement over the current time it takes (~ 160 weeks) to design a custom DoD ASIC chip. However, the researchers aim in their first fab run to demonstrate a 5x reduction, i.e., cutting design time by 80 percent. By the end of the project, they plan to demonstrate a 10x cut in design time, i.e., a 90 percent drop. “Reducing the effort required to design and verify leading-edge CMOS ASICs is critical to development of next-generation defense systems that require high computational performance in a power-constrained environment,” said DARPA Microsystems Technology Office (MTO) Program Manager Dr. Linton Salmon.   

    To achieve that goal, the CERTUS team proposes to develop learning algorithms that spot and enhance ‘regularity’ in high-level descriptions, build sophisticated pipelines, and enable system architects to compose blocks, including analog blocks that are difficult to automate.

     “We propose a synthesis methodology that targets not only the design tools but also the flow of design data across different tools that are akin to business processes,” said UCLA professor Mani Srivastava, noting that the project must take into account the role of commercial tools and third-party intellectual property (IP) in the design process. “Once micro-architectural design is complete, the flow through commercial tools proceeds rapidly but faces tortuous repetitions to close the ‘last MHz’ gap in performance.”

    The project will focus on high-performance systems-on-chips that contain one or more processing elements, usually in the form of an IP block produced from commercial vendors and supported by publicly-available software development tools. In the first phase of the project, researchers will design and build an accelerator-centric SoC for use in autonomous vehicles under the Autonomy project with Northrop-Grumman Aerospace Systems and UC San Diego’s new Contextual Robotics initiative. In phase two, the focus will be on process porting issues, and the University of Michigan will take the lead on an ARM-hosted, accelerator-based implementation of the DARPA-selected SoC design (leveraging a decade-old research agreement between ARM and Michigan). The SoC will contain an array of processing cores based on the RISC V processor from Berkeley.

    At UC San Diego, Prof. Gupta pulled together a group from the Computer Science and Engineering (CSE) and Electrical and Computer Engineering (ECE) departments in the Jacobs School of Engineering. CSE-based faculty include Gupta himself and Michael Taylor (who was the lead architect of the DARPA-funded MIT Raw 16-core multicore processor chip). They will collaborate with ECE professors Patrick Mercier and Ian Galton (the inventor of a new type of high-performance, phase-locked loop, or PLL, implemented as the clock generator in the latest Qualcomm Snapdragon mobile processor) and Patrick. Other investigators on the DARPA project include UCLA’s Mani Srivastava, Cornell professors Zhiru Zhang and Christopher Batten, and Ron Dreslinski at the University of Michigan.

  • CSE Appoints Department Financial Manager

    CSE has a new Financial Manager, effective immediately, but she didn't have to come from far -- just down Warren Mall. Irene Xavier worked in the Dean's office of the Jacobs School of Engineering, where she has been the Fiscal Operations Manager since 2014. Before that, she held positions as Business Operations Analyst for the Experiential Learning Center for UC San Diego (for two years), State Funds Manager, and later Contracts and Grants Manager for the department of Electrical and Computer Engineering (ECE) from 2006 to 2012.

    Prior to her work in ECE, Xavier spent nearly 10 years as Program Manager for the UC San Diego-based California Space Institute. "In other words," said MSO Samira Khazai in the announcement, "Irene brings with her a wealth of financial experience and knowledge from around the university and we are very excited she is joining our department!" Xavier can be found next door to Khazai, in office #2260 (while Loretta Smith moves to #2210).

  • Software Engineering Online: Introductory, or Intermediate?

    Aspiring programmers have the choice between two levels of software engineering commissioned by the Coursera online platform and sponsored by Google.

    Starting April 1, learners can choose between courses at the introductory (beginner) level or the intermediate level. When Coursera went in search of a university to provide the expertise and teach software engineering, UC San Diego was invited to create the intermediate courses. Three teaching professors in CSE -- Christine Alvarado, Mia Minnes and Leo Porter -- jointly created a series of four courses and a capstone project. The intermediate series launched in 2015, and three of the four courses will begin again on August 1. Enrollment is open in the "Java Programming: Object-Oriented Design of Data Structures" Specialization. Google has contributed real-world projects and the involvement of its engineers as guest lecturers.

    If you worry about not having sufficient background for the intermediate courses, Coursera turned to Duke University to create the courses for beginners in software engineering. The official title of the Specialization is "Java Programming: An Introduction to Software." Coursera commissioned the introductory courses from computer scientists at Duke University led by professor Andrew Hilton, and Google agreed to play an advisory role as it did for the intermediate series from UC San Diego (e.g., sharing real-world insights and anecdotes as well as helping to review the capstone projects). The first three courses of the series have been in session since July 25 and run through August 28, but learners are allowed to take courses out of sequence, and on August 1, Coursera will offer the fourth course in the series, "Java Programming: Principles of Software Design."

  • KnuEdge, UC San Diego Host Conference, Competition to Drive Next-Gen Machine Learning Performance

    Former NASA Administrator Dan Goldin, now CEO of KnuEdge, and Calit2 Director Larry Smarr have announced the Heterogeneous Neural Networks (HNN) Conference, to be held in spring 2017 in San Diego, Calif. KnuEdge delivers LambdaFabric neural computing technology that accelerates machine learning and signal processing. The event will also include a KnuEdge-sponsored research paper competition, challenging participants to enable the next generation of machine learning performance and efficiency through developing heterogeneous neural network algorithms.

    "Machine learning has captured the tech industry's attention due to its potential to positively disrupt computing, accelerating cutting-edge technologies ranging from medical research to financial and insurance risk analysis, facial and voice recognition and augmented reality," said Dan Goldin (at right), CEO of KnuEdge. "But to get there, we must encourage and accelerate innovation and unlock what's next in the field. That is why we've decided to launch the Heterogeneous Neural Networking Conference with Calit2."

    KnuEdge and Calit2 have worked together since the early days of the KnuEdge LambdaFabric processor when key personnel and technology from UC San Diego provided the genesis for the first processor design. The HNN Conference brings the two organizations back together to focus on advancing machine learning capability and performance. 

    "KnuEdge built its LambdaFabric processor technology to help deliver on the promise of machine learning," said Calit2's Smarr, who is also a professor of Computer Science and Engineering in the Jacobs School of Engineering. "Heterogeneous neural network algorithms are tailored to emulate the efficiency of specific neurobiological pathways that have evolved through natural history. However, this requires the ability to perform sparse matrix multiplication, and hardware optimized for sparse matrix multiplication has been largely unavailable. KnuEdge provides this optimized hardware, enabling analysis of the data as it's delivered from the real world -- allowing much faster computation and time-to-solution."  

    Preceding the conference, KnuEdge will sponsor a research paper competition for the most innovative and effective heterogeneous algorithms built on today's advanced computing architectures. Currently, there is relatively little opportunity for researchers in the emerging field of heterogeneous neural networks to share their work and collaborate with other experts. This workshop will enable these specialists to learn and exchange ideas with their peers, showcase their work and gain recognition as pioneers of the discipline. 

    The vast majority of machine learning computing today is based on homogenous and convolutional neural network technology, an approach that took hold largely due to the availability of traditional computer architectures, but at the expense of extraordinary computational time and power. Industry thought leaders have long suspected that much greater efficiency and performance could be driven through the use of sparse matrix versus dense matrix multiplication.

    For instance, the GoogLeNet paper, "Going Deeper with Convolutions" by Christian Szegedy et al., proposes a solution to overfitting and wasted computation with required large computing infrastructure: "The fundamental way of solving both issues would be by ultimately moving from fully connected to sparsely connected architectures, even inside the convolutions. Besides mimicking biological systems, this would also have the advantage of firmer theoretical underpinnings due to the groundbreaking work of Arora et al... On the downside, today's computing infrastructures are very inefficient when it comes to numerical calculation on non-uniform sparse data structures."

    Another paper, "Sparse Convolutional Neural Networks" by Baoyuan Liu et al., states: "In this paper, we show how expressing the filtering steps in a convolutional neural network using sparse decomposition can dramatically cut down the cost of computation, while maintaining the accuracy of the system... In our Sparse Convolutional Neural Networks (SCNN) model, each sparse convolutional layer can be performed with a few convolution kernels followed by a sparse matrix multiplication."

    In October 2015, at Mark Anderson's Future in Review conference, Calit2 Director Smarr announced the formation of a Pattern Recognition Laboratory (PRL), housed in Calit2's Qualcomm Institute. The PRL is dedicated to exploring acceleration of a wide range of machine learning algorithms on novel, non-von Neumann computer architectures. KnuEdge will provide its LambdaFabric technology this year to Calit2's PRL.

    "The mission of our Pattern Recognition Lab is to find major increases in energy efficiency and speedups by optimizing machine learning algorithms on novel computing architectures," said PRL Director Ken Kreutz-Delgado, a professor of Electrical and Computer Engineering in the Jacobs School. "We believe this KnuEdge-sponsored contest and conference will accelerate this mission, and we look forward to participating."

    Details on the competition, conference agenda, speakers and venue will be released in September 2016. To sign up for email notifications, please contact, with the subject line "HNN Conference 2016."